The manufacturing of integrated circuits includes multiple photolithography processes. When the dimensions of the integrated circuits become increasingly smaller, the requirement for controlling the critical dimensions of the integrated circuits is also increasingly tightened. The critical dimensions are the minimum width of gate electrodes of the transistors in the wafer. The critical dimensions may be used as a reference for forming metal layers.
In processes for controlling the critical dimensions, a tri-layer mask is formed on a wafer. The tri-layer mask includes a bottom layer, a middle layer over the bottom layer, and a photoresist over the middle layer. The photoresist is exposed using a photolithography mask, which includes opaque patterns and transparent patterns. The photoresist is then patterned through development. The patterned photoresist is used as an etching mask of the middle layer. The patterned middle layer is then used as an etching mask to etch the bottom layer. The patterned bottom layer is used as an etching mask to etch an underlying layer.